This invention relates to the field of integrated circuit fabrication. More particularly, this invention relates to testing an integrated circuit for cracks under bonding pad structures.
Integrated circuits become more powerful as the number of devices within the integrated circuit increases. However, with this increase in the number of devices in an integrated circuit there also comes a general increase in the amount of surface area required to contain the integrated circuit on a substrate. As there is also a desire to generally reduce the size of integrated circuits, new techniques are continually required to both reduce the size of the devices within the integrated circuit and to otherwise place more devices within a given surface area.
One element of an integrated circuit that requires a relatively large amount of surface area is a bonding pad. This amount of required surface area is compounded by the typically large number of bonding pads required by an integrated circuit. It is therefore desirable to use the space underneath the surface area of a bonding pad for additional elements of the integrated circuit, such as active circuitry.
Unfortunately, the pressure that is placed upon a bonding pad during probing processes and wire bonding processes tends to crack underlying layers, which may fatally disrupt any active circuitry that is placed underneath the bonding pad. The problems caused by the cracks in these circumstances may not be detectable for some length of time, and thus the long term reliability of the integrated circuit so effected is reduced.
There is a need, therefore, for test structures that are able to detect cracking under bonding pad structures, so that such conditions can be quickly and easily identified so that faulty integrated circuits are not shipped, and process fixes can be implemented so that additional faulty integrated circuits are not produced.
The above and other needs are met by an integrated circuit having a crack detection structure. A control structure is formed having interleaved electrically conductive layers and nor electrically conductive layers in a vertical orientation. Electrically conductive vias are disposed vertically through all of the non electrically, conductive layers, which vias electrically connect all of the electrically conductive layers one to another. A test structure is formed having a bonding pad for probing and bonding, with underlying interleaved electrically conductive layers and non electrically conductive layers disposed in a vertical orientation. At least one of the non electrically conductive layers has no vias formed therein, simulating active circuitry under other bonding pads of the integrated circuit. At least one of the interleaved electrically conductive layers of the control structure extends from within the control structure to within the test structure as a sensing layer. The sensing layer immediately underlies the at least one of the non electrically conductive layers in the test structure that has no vias formed therein. Thus, a crack in the at least one of the non electrically conductive layers in the test structure that has no vias formed therein is detectable as a leakage current between the bonding pad of the test structure and a top most electrically conductive layer of the control structure.